When enabled, the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the driving of bus lines without external resistors. When disabled, both the output transistors are turned OFF presenting a high-imped- ance state to the bus line. Thus the output will act neither as a significant load nor as a driver. To minimize the possi- bility that two outputs will attempt to take a common bus to opposite logic levels, the disable time is shorter than the enable time of the outputs. August
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The QS is ideal for. The QS is ideal for , significant power consumption to the system. QuickSwitch devices provide an order of magnitude faster speed , compatible with the 74' function Zero propagation delay, zero ground bounce Undershoot clamp diodes on. Individual active high , the system. QuickSwitch devices provide an order of magnitude faster speed than conventional logic. Abstract: No abstract text available Text: magnitude faster speed than conventional logic devices.
74126 Datasheet PDF
August Revised March General Description. This device contains four independent gates each of which. The outputs have.